Sapozhnikov Vladimir Vladimirovich

Publications in Math-Net.Ru

1. Boolean-complement based fault-tolerant electronic device architectures
   
   Avtomat. i Telemekh., 2021, no. 8,  140–158
2. Two-module weight-based sum code in residue ring modulo $M=4$
   
   Tr. SPIIRAN, 19:3 (2020),  674–713
3. Sum codes with fixed values of multiplicities for detectable unidirectional and asymmetrical errors for technical diagnostics of discrete systems
   
   Avtomat. i Telemekh., 2019, no. 6,  121–141
4. Fault detection in combinational circuits based on self-dual complement to constant-weight code
   
   Proceedings of ISP RAS, 31:1 (2019),  115–132
5. Synthesis of self-checking combination devices based on allocating special groups of outputs
   
   Avtomat. i Telemekh., 2018, no. 9,  79–94
6. Sum codes with efficient detection of twofold errors for organization of concurrent error-detection systems of logical devices
   
   Avtomat. i Telemekh., 2018, no. 4,  105–122
7. The organization of the totally self-checking integrated control circuit based on the boolean complement method up to «2-out-of-4» constant-weight code
   
   Proceedings of ISP RAS, 30:2 (2018),  99–112
8. Conditions for detecting a logical element fault in a combination device under concurrent checking based on Berger's code
   
   Avtomat. i Telemekh., 2017, no. 5,  152–165
9. New structures of the concurrent error detection systems for logic circuits
   
   Avtomat. i Telemekh., 2017, no. 2,  128–143
10. Design of self-checking concurrent error detection systems based on "$2$-out-of-$4$" constant-weight code
    
    Probl. Upr., 2017, no. 1,  57–64
11. Modified codes with weighted-transitions summation in concurrent error detection systems of combinational circuits
    
    Proceedings of ISP RAS, 29:5 (2017),  39–60
12. Modulo codes with summation of weighted transitions with natural number sequence of weights
    
    Tr. SPIIRAN, 50 (2017),  137–164
13. Applications of modular summation codes to concurrent error detection systems for combinational Boolean circuits
    
    Avtomat. i Telemekh., 2015, no. 10,  152–169
14. On codes with summation of data bits in concurrent error detection systems
    
    Avtomat. i Telemekh., 2014, no. 8,  131–145
15. Summation codes for organization of control of combinational circuits
    
    Avtomat. i Telemekh., 2013, no. 6,  153–164
16. A modified summation code for organizing control of combinatorial circuits
    
    Avtomat. i Telemekh., 2012, no. 1,  169–177
17. On summation code properties in functional control circuits
    
    Avtomat. i Telemekh., 2010, no. 6,  155–162
18. Checking of combinational circuits basing on modification sum codes
    
    Avtomat. i Telemekh., 2008, no. 8,  153–165
19. Checking combinational circuits by the method of logic complement
    
    Avtomat. i Telemekh., 2005, no. 8,  161–172
20. Logic Complement, a New Method of Checking the Combinational Circuits
    
    Avtomat. i Telemekh., 2003, no. 1,  167–176
21. Self-Dual Self-Testing Multicycle Circuits: Their Properties
    
    Avtomat. i Telemekh., 2001, no. 4,  148–159
22. Detection of faults in combinational circuits by a self-dual test
    
    Avtomat. i Telemekh., 2000, no. 7,  140–149
23. Self-testing combinational circuits: their design through the use of the properties of self-dual functions
    
    Avtomat. i Telemekh., 2000, no. 2,  151–163
24. A functional fault-detection self-test for combinational circuits
    
    Avtomat. i Telemekh., 1999, no. 11,  162–174
25. Fault Detection in Self-Test Combination Circuits Using the Properties of Self-Dual Functions
    
    Avtomat. i Telemekh., 1997, no. 12,  193–200
26. Self-testing Comparator with an Additional Impulse Input
    
    Avtomat. i Telemekh., 1997, no. 6,  200–208
27. Investigation of Combination Self-Testing Devices Having Independent and Monotone Independent Outputs
    
    Avtomat. i Telemekh., 1997, no. 2,  180–193
28. Methods for providing safety in discrete systems
    
    Avtomat. i Telemekh., 1994, no. 8,  3–50
29. Construction of combinational self-checking devices with monotonically independent outputs
    
    Avtomat. i Telemekh., 1994, no. 7,  148–160
30. Self-checking checkers for equilibrium codes
    
    Avtomat. i Telemekh., 1992, no. 3,  3–35
31. Self-checking checkers for equilibrium codes
    
    Avtomat. i Telemekh., 1992, no. 2,  197–200
32. Design of self-checking checkers for 1-out-of-3 codes
    
    Avtomat. i Telemekh., 1991, no. 2,  178–188
33. Interpreter program implementation of self-checking testers
    
    Avtomat. i Telemekh., 1990, no. 3,  141–150
34. Error detection in the software of self-checking testers in microprocessor systems
    
    Avtomat. i Telemekh., 1989, no. 12,  129–140
35. Design of High-Speed Checkers for Berger Codes
    
    Probl. Peredachi Inf., 25:2 (1989),  105–112
36. Design of self-testing maximally fast $m/n$ testers
    
    Avtomat. i Telemekh., 1988, no. 10,  139–154
37. Design of Fast Checkers for Constant-Weight Codes
    
    Probl. Peredachi Inf., 24:4 (1988),  84–92
38. Synthesis of Self-Checking Checkers for Summation Codes
    
    Probl. Peredachi Inf., 22:2 (1986),  85–97
39. Properties of “short circuits” in combinational devices
    
    Avtomat. i Telemekh., 1984, no. 3,  142–150
40. Universal Algorithm for Synthesizing Self-Checking Testers for Constant-Weight Codes
    
    Probl. Peredachi Inf., 20:2 (1984),  65–76
41. Properties of multiple faults in contact logical circuits
    
    Avtomat. i Telemekh., 1981, no. 11,  139–146
42. Design of self-checking testers in automata with fault detection
    
    Avtomat. i Telemekh., 1980, no. 7,  150–160
43. On one class of easily monitorable combinational circuits
    
    Avtomat. i Telemekh., 1979, no. 10,  129–132
44. Design of completely self-monitored dead-beat automata
    
    Avtomat. i Telemekh., 1979, no. 1,  154–166
45. On contact circuit monitoring
    
    Avtomat. i Telemekh., 1978, no. 11,  175–182
46. Design of asynchronous finite automata with fault detection
    
    Avtomat. i Telemekh., 1977, no. 4,  139–148
47. State Assignment for a Finite Automaton with Simplification of Logic Converter
    
    Probl. Peredachi Inf., 13:4 (1977),  72–80
48. Algorithms for design of an equivalent normal form
    
    Avtomat. i Telemekh., 1976, no. 10,  168–174
49. Structural Simplification of the Logic Unit of a Finite Automaton Whose States Are Assigned by the Columns of the Transition Table
    
    Probl. Peredachi Inf., 11:4 (1975),  77–85
50. Derivation of Switching Functions for the Storage Elements of a Finite Automaton with State Encoding on the Columns of a Flow Table
    
    Probl. Peredachi Inf., 9:4 (1973),  90–91