Andreeva Valentina Valer'evna

Publications in Math-Net.Ru

1. Masking of internal nodes faults based on applying of incompletely specified Boolean functions
   
   Izv. Saratov Univ. Math. Mech. Inform., 20:4 (2020),  517–526
2. Path delay and multiple stuck-at fault test design for circuits derived from irredundant systems with factorized synthesis method
   
   Prikl. Diskr. Mat., 2009, no. supplement № 1,  65–66
3. Имитационное моделирование процесса управления технологическим объектом
   
   Vestn. Samar. Gos. Tekhn. Univ., Ser. Fiz.-Mat. Nauki [J. Samara State Tech. Univ., Ser. Phys. Math. Sci.], 12 (2001),  165–169