Cheptsov Vitalii Yurievich

Publications in Math-Net.Ru

1. Architecture for time synchronization in an onboard SpaceWire network of ARINC 653 nodes
   
   Proceedings of ISP RAS, 37:4(2) (2025),  7–16
2. In-kernel memory-mapped I/O device emulation
   
   Proceedings of ISP RAS, 30:3 (2018),  121–134