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Publications in Math-Net.Ru
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Application of SVAN static analysis tool on open RTL benchmarks
Proceedings of ISP RAS, 37:5 (2025), 131–142
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Comparison of high-level synthesis and hardware construction tools
Proceedings of ISP RAS, 34:5 (2022), 7–22
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Comparison of open flows for digital hardware development: qflow, openlane, coriolis, and symbiflow
Proceedings of ISP RAS, 33:6 (2021), 111–130
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Extracting assertions for conflicts in HDL descriptions
Proceedings of ISP RAS, 31:3 (2019), 135–144
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Test generation for digital hardware based on high-level models
Proceedings of ISP RAS, 29:4 (2017), 247–256
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A model checking-based method of functional test generation for HDL descriptions
Proceedings of ISP RAS, 28:4 (2016), 41–56
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A method of extended finite state machines construction from HDL descriptions based on static analysis of source code
St. Petersburg Polytechnical University Journal. Computer Science. Telecommunication and Control Sys, 2015, no. 1(212), 60–73
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An extended finite state machine-based approach to code coverage-directed test generation for hardware designs
Proceedings of ISP RAS, 27:3 (2015), 161–182
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A survey of methods for model extraction from HDL descriptions
Proceedings of ISP RAS, 27:1 (2015), 97–124
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