This article is cited in 1 paper

Simulation-based verification of system-on-chip bus controllers

M. M. Chupilko^a, E. A. Drozdova<sup>b

a</sup> Ivannikov Institute for System Programming of RAS
^b Lomonosov Moscow State University

Abstract: The paper presents an approach to verification of commutation components of Systems-on-Chip. The core idea is to verify bus controllers and supporting interface parts connected to a reference model at unit-level. The reference model in the approach is suggested to be written in SystemC so that to be easily adjusted to the required bus parameters. The in-house prototype implementing the approach has been applied to the verification of a Verilog model of Wishbone controller. There is a possibility to extend the approach to support other busses and protocols by development of the interface library.

Keywords: unit-level verification, C++TESK.

Language: English

DOI: 10.15514/ISPRAS-2018-30(4)-8

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