This article is cited in 8 papers

On the simultaneous minimization of area, power and depth of planar circuits implementing Boolean operators

G. V. Kalachev

Lomonosov Moscow State University

Abstract: The paper is devoted to Shannon function of "power", area and depth of planar circuits that implement partial Boolean operators. As the measure of power we consider maximal potential. It equals to the maximal number of outputs of gates that are equal to one, where maximum takes over all possible input vectors. This paper shows that under in significant constraints on the domain of Boolean operator there exists a planar circuit with optimal order of potential, area and depth. In particular, for everywhere defined operators with n input sand m outputs order of potential is $\frac {m \sqrt{2^n}}{\sqrt {min(m,n)}}$, order of area is m 2 nand order of depth is $max(n, \log_{2}m)$.

Keywords: boolean circuits, VLSI circuit model, at circuits, circuit power, circuit activity, Shannon function, upper bounds, partial boolean operators.