Notes

Analysis and synthesis of controlled delay lines

G. A. Leonov

St. Petersburg State University, St. Petersburg, Russia

Abstract: It is shown in the mathematically strict manner that $RC$-circuit is suitable as a controlled delay line for different problems of electronics if it is sequentially connected with a hysteretic relay. This relay is either artificially introduced or appears as non-idealness of logical elements. A possibility to apply phase locked loops to control the delay time is noted. The control here is made by changing the capacity in $RC$-circuit.

PACS: 02.30.Yy, 01.60.+q

Presented by the member of Editorial Board: A. M. Krasnosel'skii

Received: 21.04.2008

 English version: Automation and Remote Control, 2009, 70:10, 1760–1766

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