D. V. Efanov, D. V. Efanov, V. V. Sapozhnikov, Vl. V. Sapozhnikov, “Boolean-complement based fault-tolerant electronic device architectures”, Avtomat. i Telemekh., 2021, Issue 8,Pages <nobr>140

This article is cited in 4 papers

Control in Technical Systems

Boolean-complement based fault-tolerant electronic device architectures

D. V. Efanov^a, V. V. Sapozhnikov^b, Vl. V. Sapozhnikov^b

^a Russian University of Transport (MIIT), Moscow, 127994 Russia
^b Emperor Alexander I St. Petersburg State Transport University, St. Petersburg, 190031 Russia

Abstract: We propose new fault-tolerant architectures, which, in contrast to the well-known double and triple modular redundancy architectures, include only one copy of the original circuit. In the new architectures, a signal error detection circuit is used to select the functions to be corrected. The circuit is built on the basis of the Boolean complement method with parity check of calculations. A generalized architecture with Boolean complement based signal correction is presented. This architecture permits one to design the simplest fault-tolerant circuits. Algorithms for designing signal error detection circuits, as well as examples of their application, are given.

Keywords: combinational circuit, fault-tolerant architecture, TMR architecture, DMR architecture with computation checking, error correction with parity code checking, Boolean complement method.

Presented by the member of Editorial Board: M. F. Karavai

Received: 19.12.2020
Revised: 09.04.2021
Accepted: 29.04.2021

DOI: 10.31857/S0005231021080079